10 Common Device Noise Analysis Mistakes – Part 2

Transient noise analysis (TN) is a statistical time-based technique that applies to every type of circuit. TN injects random noise for each device noise source during a transient simulation to produce output waveforms that include device noise effects. It is then possible to post-process the resulting waveforms to obtain useful frequency-domain measurements. TN is the only device noise analysis applicable to non-periodic circuits and when used properly it should produce results within 1dB to 2dB of silicon measurements.  more...

10 Common Device Noise Analysis Mistakes – Part 1

Device noise is critical in nanometer-scale CMOS processes, and it fundamentally limits the performance of many circuits at 45nm and below. Given the right tools, device noise analysis (DNA) is a fairly straightforward process that should produce results that are within 1dB to 2dB of silicon measurements. However, there are a number of common mistakes can lead to grossly overestimating or underestimating the device noise impact—leading to substantial over-design and under-design.  more...

2011 Nanometer Circuit Verification Forum

On Sept. 22, Berkeley Design Automation hosted the 2011 Nanometer Circuit Verification Forum, at the TechMart in Santa Clara, CA. The event had over 100 attendees, who saw 15 user presentations, drawn from active customers, university researchers, and EDA partners. The presenters related their experiences of how the Analog FastSPICE (AFS) Platform delivers vastly superior performance and more accurate device noise analysis than other “golden” circuit simulators. These users described how in many cases AFS saves weeks or even months of simulation time or enables efficient circuit verification that has never been possible - or even attempted - before. more...

High-Speed I/O Verification

Verifying high-speed I/O circuits raises a number of difficult verification challenges at the block, complex-block (e.g., PLL, Tx, Rx), and full-circuit levels. Verifying the jitter specifications requires including device noise to the same degree of accuracy with a device noise bandwidth that is 50x the clock frequency.

The Analog FastSPICE Platform (AFS) provides the world’s fastest nm circuit verification and is ideally suited for verifying high-speed I/O. With a proven >120 dB dynamic range, it is 5x-10x faster than any other SPICE accurate simulator on a single core. To accurately measure jitter, the AFS Platform provides the world’s only full-spectrum device noise analyses for every type of circuit. AFS is the only tool proven to consistently deliver measurements within 1 dB to 2 dB of silicon. more...

Full-Circuit ADC Verification

Full-circuit ADC verification at the transistor-level has been very challenging or impossible because of the performance and capacity limitations of traditional SPICE and RF simulators, forcing designers to resort to block-level verification approaches.

With the AFS Platform, designers no longer need to rely on the block-level approach, and can verify full-circuit ADCs at the transistor-level with nanometer SPICE accuracy. AFS full-circuit ADC verification includes the impact of random device noise as well as architecture characteristics such as quantization noise. In addition, designers can include post-layout parasitics and characterize the circuit for process variation and device mismatch. more...

Full-Circuit PLL Verification

Transistor-level closed-loop PLL verification has been impossible or impractical due to traditional SPICE and RF simulator performance and capacity limitation. Thus designers have had to rely on block-level verification and behavioral models.

With the AFS Platform, designers no longer need to rely on approximate approaches. For block-level analysis, AFS RF delivers full-spectrum periodic noise analysis technology that does not trade off accuracy for performance. AFS Transient Noise analysis (AFS TN) delivers closed-loop PLL transistor-level verification, including the effects of device noise, with nanometer SPICE accuracy. In addition, designers can include post-layout parasitics and characterize the circuit for process variation and device mismatch. AFS Multi-Core Parallel reduces AFS TN run times by up to 4x by automatically running multiple transient noise simulations in parallel.  more...

Analog Circuit Characterization

Delivering nanometer-scale analog circuits requires increasingly intensive circuit characterization including: process/voltage/temperature (PVT) corners, parameter sweeps, and Monte Carlo statistical analysis. To more fully account for variations, designers also run combinations of these methods, such as corners with sweeps and sweeps with Monte Carlo.

Analog FastSPICE (AFS) is the industry’s fastest, highest accuracy, and most comprehensive platform for efficient nm analog circuit characterization. Moreover, AFS includes automation for many characterization setup and post-processing tasks. more...

Performing PLL Jitter Analysis with the AFS Platform

Performing jitter analysis for PLL circuits is increasingly important and difficult with shrinking process geometries. The impact of nanometer effects, such as layout parasitics, device noise, and device mismatch, requires greater circuit simulator accuracy, performance, and capacity than traditional simulators can provide.

The Analog FastSPICE (AFS) Platform enables design teams to perform closed-loop transistor-level PLL jitter simulations including all critical nanometer effects with silicon-verified picosecond accuracy. more...

Periodic Noise Analysis of Circuits with Sharp Transitions

Accurately analyzing the periodic noise of circuits with sharp transitions requires including device noise from a large number of harmonics (a.k.a., sidebands) – typically hundreds and often thousands. Traditional frequency-based periodic noise analysis (pnoise) employ limited-spectrum techniques that typically default to ~50 sidebands—producing approximations that may be wildly off the actual results in such circuits.

Analog FastSPICE RF (AFS RF) includes the industry’s only pnoise analysis that includes full-spectrum device noise every run with absolutely no tradeoff in accuracy versus runtime. The tool produces these results by employing a time-based technique that directly analyzes the periodic steady state (PSS) and then translates the results to the frequency domain. more...

Accurate S-Parameter Modeling with the AFS Platform

Nanometer Analog/RF Block Characterization

As analog and RF circuit designers move to lower process geometries, rigorous block characterization in the context of realistic physical effects becomes increasingly important. At 90nm and below, circuit complexity, circuit nonlinearity, and physical effects—including process variation, device noise, device mismatch, and detailed parasitics—make such characterization a growing computational bottleneck.

Device Noise Analysis

Device noise in analog/RF circuits is critical at 90nm and limits AMS/RF performance at 45nm and below. Analog/RF designers need to understand and overcome the increasing negative impact of device noise to performance, signal-to-noise ratio (SNR), bit error rate (BER), and power requirements in their circuits. Existing device noise analysis tools and behavioral model based approaches are no longer sufficient to characterize device noise in nanometer CMOS due accuracy, performance, and capacity limitations.

The Analog FastSPICE Platform technology that overcomes the practical and performance limitations of traditional device noise analysis tools. The AFS Platform is the only device noise analysis solution that offers nanometer SPICE accuracy. more...