10 Common Device Noise Analysis Mistakes – Part 1

Device noise is critical in nanometer-scale CMOS processes, and it fundamentally limits the performance of many circuits at 45nm and below. Given the right tools, device noise analysis (DNA) is a fairly straightforward process that should produce results that are within 1dB to 2dB of silicon measurements. However, there are a number of common mistakes can lead to grossly overestimating or underestimating the device noise impact—leading to substantial over-design and under-design.

There are three basic types of DNA. Transient noise analysis is a statistical time-based technique that applies to every type of circuit. In fact it’s the only device noise analysis applicable to non-periodic circuits. For driven periodic circuits such as charge pumps and switched-capacitor filters, periodic noise analysis is generally much faster and provides better diagnostic information than transient noise analysis. Similarly for autonomous periodic circuits, oscillator noise analysis is much faster and provides better diagnostic information (e.g., device contribution and sensitivity analysis) than transient noise analysis. Since transient noise analysis is applicable to all types of circuits, it provides a good way to cross-check results for periodic circuits and oscillators. Used correctly, the techniques should produce results within 1dB to 2dB of each other and silicon measurements.

Common Mistake #1: Insufficient Transient Accuracy

Most nm circuits have performance-critical specifications that require 80dB to 120dB of dynamic range. Default SPICE tolerances are insufficient to ensure this level of accuracy in transient, let alone DNA which depends on transient accuracy. The default SPICE reltol = 1e-3 should provide at least 60dB of dynamic range. A good guideline is to tighten reltol one order of magnitude for every additional 20dB of required dynamic range. For example, reltol = 1e-5 should ensure at least 100dB of dynamic range.

Common Mistake #2: Periodic Noise Analysis with Too Few Sidebands

Traditional periodic noise analysis uses a limited-spectrum approach where the resulting accuracy is highly dependent on the number of sidebands used in the analysis. For nm-scale circuits with sharp transitions, the default number of sidebands (<50) is grossly insufficient to accurately capture all relevant noise. Accurately measuring noise for such circuits often requires several hundred to >1000 sidebands. Designers using such tools need to successively double the number of sidebands until the results do not change to try to achieve an accurate result. Unfortunately the runtime increases approximately quadratically with the number of sidebands and the tool fails to run due to excessive memory requirements. Alternatively, designers can use AFS RF full-spectrum device noise analysis that produces accuracy equivalent to an unlimited number of sidebands every run.

Common Mistake #3: Simplifying Circuits for Periodic Noise

Traditional periodic noise analysis has severe capacity limitations—especially when run with the required number of sidebands to accurately capture device noise effects (see Common Mistake #2). As a result, designers often simplify their circuits in order to accommodate the tool, for example, analyzing circuits without buffers and dividers and replacing entire bias circuitry by ideal bias. Such approaches necessarily create more work for the designer. However, they also make it impossible to accurately measure coupling effects from tightly interacting circuitry. Periodic noise analysis tools, such as AFS RF should robustly converge on circuits with more than 100K elements—producing more accurate results while reducing designer workload.

Common Mistake #4: Not Including Parasitics in VCO DNA

Due to traditional oscillator analysis capacity limitations, designers often run VCOs in pre-layout form only. Parasitics have important non-linear attenuation effects on high-frequency circuits such as VCOs. In addition parasitic resistances may be important device noise contributors. Analyzing the device noise impact on pre-layout VCOs can result in considerable inaccuracies that are completely avoidable with tools such as AFS RF which robustly converge on VCOs with detailed parasitics.

Common Mistake #5: Using Oscillator Noise Instead of VCO Noise

Free-running oscillators operate at a fixed voltage which determines their frequencies. However voltage-controlled oscillators (VCOs) operate at fixed frequency with PLL feedback that determines the controlling voltage. With process/voltage/temperature (PVT) variations, analyzing the device noise impact of the same oscillator analyzed as free running (i.e., with oscnoise) versus as voltage controlled (i.e., with vconoise) can produce significantly different results. VCO designers should always use vconoise analysis such as that provided in AFS RF for accurate results.

Common Mistake #6: Manually Analyzing VCO Sensitivity

Minimizing VCO phase noise requires knowing more than just the total or average noise contribution of each device. In fact, that information alone is often misleading. What actually matters is how the instantaneous noise from each device contributes to the VCO output noise. Trying to determine this manually is tedious, error prone, and provides an approximation at best. As highlighted in the plot below AFS RF automatically produces the noise intensity, sensitivity, and the noise and sensitivity product over the oscillation period for all devices which designers can use to accurately optimize their VCOs.

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