Performing PLL Jitter Analysis with the AFS Platform

Performing jitter analysis for PLL circuits is increasingly important and difficult with shrinking process geometries. The impact of nanometer effects, such as layout parasitics, device noise, and device mismatch, requires greater circuit simulator accuracy, performance, and capacity than traditional simulators can provide. The traditional methodology for analyzing jitter includes block-level periodic steady state (pss) and periodic noise (pnoise) analyses and behavioral modeling to estimate the closed-loop PLL jitter. Although this approach was sufficient for up to a few GHz on >130nm processes, it does not provide sufficient accuracy for leading-edge PLL applications on nanometer-scale silicon.  

The Analog FastSPICE (AFS) Platform enables design teams to perform closed-loop transistor-level PLL jitter simulations including all critical nanometer effects with silicon-verified picosecond accuracy.  

Thermal and flicker device noise are the most critical nanometer effect contributing to PLL jitter. The AFS Transition Noise analysis automatically adds thermal and flicker device noise effects to an otherwise normal transient simulation. Running it requires

• Setting the transient tolerances for the required dynamic range.
• Setting two transient noise options
• Simulating enough number of clock cycles for acceptable sample uncertainty
• Accurately post-processing the results  

The figure below shows a PLL jitter histogram generated from a transient analysis only and a transient noise analysis (i.e. without and with device noise, respectively).

AFS Transient Noise analysis provides accuracy within the transient tolerance settings, provides >10M-element capacity, and is very fast. Running with transient noise analysis is within 2x of the runtime of an equivalent transient only simulation. For more performance, designers can use the AFS Multi-Core Parallel (MCP) operating mode to parallelize up to 4 transient noise runs delivering >3x overall speedup versus a single-core run. AFS automates the associated MCP setup and results aggregation. In most cases AFS Transient Noise analysis can produce silicon-accurate jitter results in an overnight run.   AFS also automates jitter analysis post-processing with the AFS WaveCrave Calculator Pad (CalcPad). CalcPad generates complex measurements and plots in a repeatable fashion with simple, easily customized scripts. Two built-in scripts produce several standard PLL jitter measurements including absolute jitter, RMS period jitter and cycle-to-cycle jitter. The figure below shows a typical jitter output histogram.

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