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Berkeley Design Automation Delivers Industry's First Fractional-N PLL Transistor-Level Noise Analysis
Tool Verifies and Optimizes PLL Noise and Jitter with True SPICE Accuracy
Santa Clara, CA, — October 23, 2008— Berkeley Design
Automation, Inc., provider of Precision Circuit Analysis™
technology for advanced analog and RF integrated circuits (ICs), today
announced the industry's first closed-loop noise analysis of
fractional-N phase-locked loops (PLLs) at the transistor level.
Combining transient noise and periodic noise analysis in the company's
Noise Analysis Option™ device noise analyzer, designers can now
optimize and characterize all fractional-N and integer-N PLLs for phase
noise and jitter prior to silicon fabrication. The result is improved
performance, lower power, and faster time-to-market. The Noise Analysis
Option is an option to the company's award winning Analog
FastSPICE™ circuit simulator, which is widely recognized as
delivering true SPICE accurate results 5x-10x faster on 5x-10x larger
circuits than any alternative.
Fractional-N PLLs are used across a wide variety of applications for
their superior resolution and performance. Until now, however, it has
been impossible to accurately analyze their closed-loop phase noise and
jitter at the transistor-level including subtle time-varying device
noise effects such as flicker noise and spurs. Instead, design teams
have had to rely on behavioral modeling approximations and costly test
chips. The Berkeley Design Automation Noise Analysis Option delivers
the industry's first closed-loop transistor-level fractional-N PLL
noise analysis, including the effects of device noise, with true SPICE
accuracy.
"Accurate transistor-level noise analysis of complete fractional-N PLLs
is becoming critical for nanometer RFICs, but this analysis has been
impossible or impractical," said Edward Youssoufian, Director of RF
Engineering and Founder, Newport Media, Inc. "Only the Noise Analysis
Option can measure our fractional-N PLL closed-loop noise analysis with
true SPICE accuracy. Adding Analog FastSPICE Co-Simulation for our
PLL's digital blocks increased performance another 3x and produced
identical results. The PLL phase noise in both cases correlated
extremely well with our silicon measurements."
Berkeley Design Automation tools include Analog FastSPICE™
circuit simulation, Noise Analysis Option™ device noise analyzer,
RF FastSPICE™ periodic analyzer, and PLL Noise Analyzer™.
The company guarantees identical waveforms to the leading "golden"
SPICE simulators down to noise floor (typically 0.1% or less) while
delivering 5x-10x higher performance and 5x-10x higher capacity. It
achieves this by using advanced algorithms and numerical analysis
techniques to rapidly solve the full-circuit matrix and the original
device equations without any shortcuts that could compromise accuracy.
Design teams from top-10 semiconductor companies to leading startups
use Berkeley Design Automation tools to solve big analog/RF
verification problems. Typical applications include complex-block
characterization (e.g., PLLs, ADCs, DC:DC converters, PHYs, Tx/Rx
chains) and full-circuit performance simulation (e.g., wireless
transceivers, wireline transceivers, high-speed I/O macros, memories,
microcontrollers, data converters, and power converters).
"Customers designing complex analog/RF circuits in nanometer CMOS are
rapidly adopting our noise analysis solution to optimize their designs
prior to tapeout," said Ravi Subramanian, president and CEO of Berkeley
Design Automation. "We are proud to deliver another industry
breakthrough - a practical and comprehensive noise analysis tool for
complex analog and RF circuits, including fractional-N PLLs. We are
very pleased with the excellent results our customers are obtaining
with this tool, and are confident that this technology will make a
dramatic difference for designers of tomorrow's leading-edge analog,
RF, and mixed-signal circuits."
About
Berkeley
Design Automation
Berkeley Design Automation, Inc.
is the recognized leader in advanced analog/RF verification. Its
Precision Circuit Analysis technology combines the accuracy,
performance, and capacity needed to verify GHz designs in
nanometer-scale silicon. Berkeley Design Automation has received
numerous awards including EDN Magazine's 2006 Innovation of the Year,
the 2006 Red Herring 100 North America, and the 2007 Red Herring Global
100 Finalist. Founded in 2003, the company is funded by Woodside Fund,
Bessemer Venture Partners, Matsushita Electric Industrial Co. Ltd., and
NTT Corporation. For more information, see
http://www.berkeley-da.com.
Analog FastSPICE, Noise Analysis Option, RF FastSPICE, PLL Noise
Analyzer, WaveCrave, and Precision Circuit Analysis are trademarks and
Berkeley Design is a registered trademark of Berkeley Design
Automation, Inc. Any other trademarks or trade names mentioned are the
property of their respective owners.
PR for Berkeley
Design
Automation – Cayenne Communication LLC
Michelle
Clancy, 252-940-0981, michelle.clancy@cayennecom.com
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